Office of Technology Transfer – University of Michigan

A Method for Compact Multilevel Electrical Integration of Microsystems

Technology #3898

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Researchers
Kensall D. Wise
Managed By
Joohee Kim
Licensing Specialist, Physical Sciences & Engineering 734.764.8202
Patent Protection
US Patent Pending

Background

Many applications in neuroscience and neural prosthetics would benefit from having three-dimensional arrays of electrodes to allow the simultaneous monitoring of interactions among networks of neurons spanning multiple layers of brain. However, creating practical three-dimensional arrays has remained a challenge. Typically, neural probes are batch fabricated using planar processing techniques, resulting in two-dimensional electrode configurations which have to be micro-assembled to form 3-D arrays. The existing assembly approaches are tedious and result in fragile and oversized devices.

Technology

Researchers at University of Michigan have developed a practical and efficient approach to forming 3-D neural probe arrays by changing the platform and probe designs. In this new approach, the typical silicon wafer thickness is utilized for countersinking the back-ends of the probes to achieve low profile. This allows the lead transfer tabs to be moved to the backend of the probes, eliminating the need for silicon spacers.

Applications and Advantages

Applications

  • Neural probes for microsystems

Advantages

  • Compact
  • Allows design flexibility and simplicity at negligible cost