Adaptive Reading and Writing to a Memory Array
The memristor device technology has created waves in the research and industry community and led to the consideration of using the device in multiple avenues, among which the most likely candidate for early adoption is the non-volatile memory. A research group in EECS of University of Michigan has proposed an adaptive read, write and erase method for such a resistive memory array (RRAM). This technique could potentially be applied to the next-generation non-volatile memory, whose market size is about $14.9 billion (in terms of revenue) in 2012 and is projected to increase at 15.8% in the following five years.
Self-Controlled Method in a Memristor Crossbar Memory
The proposed technique exploits the transient conductance behavior of these resistive memory devices to determine the logic state of the device. Resistive memory devices undergo larger changes in conductance before tapering out under applied bias, which can be beneficial to accurately reading, writing, and erasing these nanodevices. As a result, the proposed technique simplifies the circuit design process by combining all memory processes into the same basic circuitry. Another advantage is its resistance to process variation and device variation. Besides, the power metrics are comparable to flash memory technology. All these properties are evaluated in simulation program with integrated circuit emphasis (SPICE).
The proposed technique could be applied in the next-generation non-volatile memory, whose end-products include solid state drivers (SSD) and SD-cards. The use of memristor device increases scaling potential compared to flash memory technology and also enables the use of a crossbar structure to stack these devices.
Applications and Advantages
- Resistive memory (RRAM) design.
- Solid-State Drives (SSD) and SD-Cards.
- Simplification of the circuit design process.
- Resistance to process variation and device variation.
- Low power and energy consumption.